BlackBerry 10 OS for ARMv7 Cortex A-8 and A-9 Processors

We'll show you how to set up BlackBerry 10 OS for boards that support ARMv7 Cortex A-8 and Cortex A-9 processors.

The support for ARMv7 architecture processors (Cortex) is provided by:

  • The libstartup.a library, which initializes the ARMv7 MMU features
  • The QNX Neutrino microkernel, procnto , which uses the ARMv7 MMU

ARMv7 has two options for handling single-precision floating point: NEON and VFPv3. When ARMv7 processors boot, libstartup detects the presence of the NEON engine and Floating-Point Unit (FPU), and sets the CPU flags accordingly.

$QNX_TARGET/armle-v7 provides binaries that run only on ARMv7 processors, and that were built with options optimized for the ARMv7 architecture:

  • They use only ARMv7 instructions.
  • They use VFPv3-d16 instructions for floating-point operations.

The kernels are named procnto and procnto-instr because there's a single variant that supports only ARMv7 processors.

Behavior of shm_ctl()

The procnto microkernel for ARMv7 takes advantage of the ARMv7 MMU's physically-tagged cache to remove the 32 MB address space restriction imposed by the earlier ARM MMU architecture; the per-process address space is now 2 GB.

The microkernel doesn't implement the ARM-specific global memory region implemented by earlier microkernels for ARM. This means that shm_ctl() no longer has any ARM-specific special behavior:

  • Objects created with shm_ctl() are always mapped into each process address space. These mappings are inherited across a fork() function.
  • SHMCTL_GLOBAL is ignored, since all mappings are placed in the per-process address space.
  • SHMCTL_PRIV and SHMCTL_LOWERPROT are ignored. All mappings are created in the per-process address space with user mode access protections.

CPU flags

Runtime features for a processor are indicated by the following flags found within the flags member of the cpuinfo area of the system page:

A VFP unit is present. The VFP functionality support is enabled when the startup program detects the presence of VFP hardware and sets the system page CPU_FLAG_FPU flag.
A NEON unit is present.
An iWMMX2 coprocessor is present.
The CPU implements the ARMv7 architecture.
The target is running multiple processors.

NEON is optional in ARMv7 and may not be implemented by all processor implementations. The ARM_CPU_FLAG_NEON flag is set if a NEON unit is present.

Using ARMv7 instructions

By default, qcc provides only ARMv7 instructions.

The ARMv7 architecture introduces a number of new instructions that may provide performance benefits for certain code. For example, DSP algorithms can take advantage of the new media instructions.

For ARMv7, the -Vgcc_ntoarmv7le option makes qcc use ARMv7 instructions and generate VFPv3-d16 code for floating point. This is the default for the ARMle-v7 variant. This means that the ARMle-v7 variant can run only on ARMv7 targets with a VFP unit; it's been compiled for VFPv3-d16, which is the lowest common denominator for VFP. For example, if you use a VFPv3-d32 FPU, your compiled code will use only half of the available double-precision registers.

Last modified: 2014-12-11

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